syllabus

EI T34 SWITCHING THEORY AND LOGIC DESIGN

( Common to ICE and BME branches)

UNIT I

NUMBER SYSTEMS & CODES : Review of number systems: binary, octal and

hexadecimal– complement representation of negative numbers-BCD, ASCII, EBCDIA

weighted and self complimentary codes-Excess -3 –gray code- error detecting & error

correcting codes –hamming codes-parity generation and detection.

BOOLEAN ALGEBRA AND SWITCHING FUNCTIONS : Review of logic gates-–

universal gates- NAND/NOR realizations- Boolean Algebra - Basic theorems and

properties - switching functions–Simplification of Boolean expression-sum of products

and product of sums, Karnaugh map-Quine McClusky’s method.

INTEGRATED CIRCUITS: Classification of ICs-Comparison of various logic

families, standard TTL NAND Gate-Analysis& characteristics, TTL open collector O/Ps,

Tristate TTL, MOS & CMOS open drain and tristate outputs, IC interfacing- TTL

driving CMOS & CMOS driving TTL .

UNIT II

COMBINATIONAL LOGIC DESIGN:

Design using conventional logic gates, half adder, full adder, half subtractor, full

subtractor, magnitude comparator, Encoder, Decoder, Multiplexer, De-Multiplexer,

MUX Realization of switching functions, Parity bit generator, Code-converters, Hazards

and hazard free realizations.

Study of pin configurations of TTL- 74XX and CMOS 40XX series for the above

combinational circuits, decoders & drives for LED & LCD display.

UNIT III

SEQUENTIAL CIRCUITS : Classification of sequential circuits (Synchronous,

Asynchronous, Pulse mode, Level mode with examples) Basic flip-flops-truth table and

excitation table, synchronous and asynchronous counter design-up-down counter, BCD

counter- Design of modulo-N Ring & Shift registers-timing sequence-tracing problems-

Hazard and hazard free asynchronous counters.

UNIT IV

DESIGN OF SEQUENTIAL CIRCUITS: basic models of sequential machinesconcept

of state diagram –design with state equations –simple circuit implementations.

Design of synchronous counters. Decade counter, shift registers & applications- Study of

pin configurations of TTL- 74XX and CMOS 40XX series for the above sequential

circuits.

UNIT V

ALGORTHMIC STATE MACHINES : Salient features of the ASM chart-Simple

examples-System design using data path and control subsystems-control

implementations-examples of Weighing machine and Binary multiplier.

PROGRAMMABLE LOGIC DEVICES, THRESHOLD LOGIC : Basic PLD’s-

ROM, PROM, PLA, PLD Realization of Switching functions using PLD’s. Capabilities

and limitations of Threshold gate, Synthesis of Threshold functions, Multigate Synthesis.

TEXTBOOKS:

1. Morris Mano, Digital Design –, PHI, 3rd Edition, 2006.

2. Anand Kumar, Digital Electronics, PHI, 2008

REFERENCE BOOKS:

1. Zvi Kohavi, Switching & Finite Automata theory –TMH, 2nd Edition.

2. Fletcher, An Engineering Approach To Digital Design –PHI.